In the recent semiconductor processing technology, a challenge to higher integration of large-scale integrated circuits places an increasing demand for miniaturization of circuit patterns. There are increasing demands for further reduction in size of circuit-constructing wiring patterns and for miniaturization of contact hole patterns for cell-constructing inter-layer connections. As a consequence, in the manufacture of circuit pattern-written photomasks for use in the photolithography of forming such wiring patterns and contact hole patterns, a technique capable of accurately writing finer circuit patterns is needed to meet the miniaturization demand.
In order to form a higher accuracy photomask pattern on a photomask substrate, it is of first priority to form a high accuracy resist pattern on a photomask blank. Since the photolithography carries out reduction projection in actually processing semiconductor substrates, the photomask pattern has a size of about 4 times the actually necessary pattern size, but an accuracy which is not loosened accordingly. The photomask serving as an original is rather required to have an accuracy which is higher than the pattern accuracy following exposure.
Further, in the currently prevailing lithography, a circuit pattern to be written has a size far smaller than the wavelength of light used. If a photomask pattern which is a mere 4-time magnification of the circuit feature is used, a shape corresponding to the photomask pattern is not transferred to the resist film due to influences such as optical interference occurring in the actual photolithography operation. To mitigate these influences, in some cases, the photomask pattern must be designed to a shape which is more complex than the actual circuit pattern, i.e., a shape to which the so-called optical proximity effect correction (OPC) is applied. Then, at the present, the lithography technology for obtaining photomask patterns also requires a higher accuracy processing method. The lithographic performance is sometimes represented by a maximum resolution. As to the resolution limit, the lithography involved in the photomask processing step is required to have a maximum resolution accuracy which is equal to or greater than the resolution limit necessary for the photolithography used in a semiconductor processing step using a photomask.
A photomask pattern is generally formed by forming a photoresist film on a photomask blank having a light-shielding film on a transparent substrate, writing a pattern using electron beam, and developing to form a resist pattern. Using the resulting resist pattern as an etch mask, the light-shielding film is etched into a light-shield pattern. In an attempt to miniaturize the light-shield pattern, if processing is carried out while maintaining the thickness of the resist film at the same level as in the art prior to the miniaturization, the ratio of film thickness to pattern width, known as aspect ratio, becomes higher. As a result, the resist pattern profile is degraded, preventing effective pattern transfer, and in some cases, there occurs resist pattern collapse or stripping. Therefore, the miniaturization must entail a thickness reduction of resist film.
As to the light-shielding film to be etched using the resist as an etching mask, a number of materials were proposed. Among others, chromium compound films are most often used in practice because their etching behaviors are well known and the standard process has been established. However, when it is desired to produce a mask for use in exposure for printing the desired pattern having a minimum line width of 45 nm, the process of etching a light-shielding film of chromium base material through a resist film which is made thin for the above reason becomes unlikely to ensure a sufficient processing accuracy.
One known method for dry etching a metal base material film using a thin film form of resist is by providing as an etching mask film a film which is resistant to dry etching conditions of the metal base material film and is dry etchable under conditions that cause relatively little damages to the resist film. As one example, JP-A 2007-241060 discloses that to enable dry etching of a light-shielding film of silicon base material using a thin film form of resist, a film of chromium base material having a thickness which is thin, but sufficient as the etching mask is used as the etching mask film. The resulting mask pattern is improved in accuracy. Also JP-A 2006-146152 discloses the use of a silicon base material film as a mask during etching of a chromium base light-shielding film.
With regard to the use of a silicon base material film as the mask during etching of a chromium base material film, JP-A 2008-026500 proposes the use of a silicon oxide base film of coating type, known as spin-on glass (SOG) film, rather than the film deposited by sputtering as mentioned above.
The SOG film has the advantage that a film having a high flatness is readily formed by spin coating and subsequent heating. An etching mask film can be formed at a very high efficiency as compared with the film deposition by sputtering. However, a problem arises when an SOG film is formed by heating a film of a quite common silicon oxide base polymer as disclosed in JP-A 2008-026500. The step of transferring the resist pattern by fluorine dry etching is very smooth as compared with the sputtered film. However, upon chlorine dry etching, this SOG film has poor etching resistance and thus fails to provide a sufficient accuracy in thin film form, resulting in a noticeable line edge roughness (LER). If the SOG film is made thick, there is an increased possibility that a residue problem arises upon stripping. Thus the mask processes using currently available SOG films as the etching mask film fail to achieve the desired level of accuracy.